AI is undergoing exponential growth with compute requirements doubling every 100 days. Industry challenges such as low yield of large dies, the need for increased flexibility, high development costs on the latest processes, reticle limits on chip size and the need for process technology specialization is driving the industry to chiplets. Chiplets can improve yield, reduce cost, and offer flexibility for scaling performance via homogeneous repetition or heterogeneous functionality enabled by optimal process technology.
Ncore 3 is a configurable cache coherent interconnect with optional system level cache that supports both full coherency for CPU cache coherence and I/O coherency for high-performance I/O. The Ncore Multi-Die option expands cache coherency across multiple chiplets to increase scalability, performance and reduce cost.
What you’ll learn:
Chiplets can improve yield, reduce cost, and offer flexibility for scaling. Learn the difference between homogeneous and heterogeneous multi-die systems and the various chiplet topologies Ncore with multi-die option can support. And discover how Magillem tools help manage the complexity of large multi-die designs providing a single source of truth throughout the development flow.