Download FlexGen Datasheet

FlexGen is Arteris’ Smart NoC IP designed to automate the creation of high-performance NoC designs, leveraging smart AI heuristics using machine-learning technology and decades of NoC IP expertise, incorporating physical and performance awareness to streamline SoC design processes. This automation facilitates the rapid creation and iteration of NoC topologies, providing engineers with a robust starting point for physical layout and synthesis. By automating critical tasks such as simulation, verification, and timing closure, FlexGen makes it easy to develop, verify and iterate non-cache-coherent high performance, low-power SoC interconnect configurations. FlexGen makes Network-on-Chip engineering expertise optional, enhancing productivity and allowing engineers to focus on innovation rather than manual interconnect adjustments. The IP supports essential industry-standard protocols and its Functional Safety (FuSa) option meets up to ASIL D requirements, making it suitable for safety-critical applications.

What you’ll learn:

• Automated NoC creation: FlexGen delivers 10x productivity boost with up to 30% wirelength reduction, lowering latency and power consumption compared to expert manual implementations.
• Physical Awareness and Layout Optimization: FlexGen enhances SoC design with advanced physical awareness, optimizing layout and timing closure, improving performance, and reducing area cost.
• Performance and Power Management: FlexGen interconnect IP optimizes SoC performance with various topologies and advanced power management capabilities, contributing to energy efficiency and battery life extension.
• Functional Safety and Reliability: FlexGen provides hardware-based data protection and meets ISO 26262 functional safety standards up to ASIL D, ensuring reliability for safety-critical applications.